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For the first time in more than 40 years, the microchip industry is confronted with limits to transistor size, to its environmental footprint, and to its workforce pipeline readiness. Good business decisions require knowledge of consequences for people, planet, and profits.  FUTUR-IC Global Alliance supports continued scaling of system performance while targeting Net Zero environmental impact by 2050. 

It will provide a 3D Roadmap for concurrent scaling of Technology, Ecology, and Workforce (TEW). Solutions defined by concurrent TEW constraints will build a common learning curve on which to base decades of progress.

Agarwal, Anu.jpeg

Principal Investigator

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